Sample output of the Simplified upgrade

This is a sample output of the simplified upgrade for a Extreme NetIron MLX series device.

device#copy tftp system 10.20.81.154 manifest MLX06300aa_Manifest.txt
.TFTP: Download to flash done.
.TFTP: Download to flash done.
Verified OK
FIPS: Image verification passed for manifest_tmp

SYSLOG: <14>Aug  9 2019 19:40:39 FIPS: Image verification passed for manifest_tmp 

SYSLOG: <14>Aug  9 2019 19:40:39 Single-command upgrade started. 

1) Download MP monitor image /Monitor/ManagementModule/xmb06200.bin from tftp 10.20.81.154
...................................TFTP: Download to flash done.

2) Download LP monitor image /Monitor/InterfaceModule/xmlb06200.bin from tftp 10.20.81.154
....................................TFTP: Download to flash done.

3) Download MP application image /Application/ManagementModule/xmr06300aa.bin from tftp 10.20.81.154 to primary:
.....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................TFTP: Download to flash done.

4) Download LP application image /Application/InterfaceModule/xmlp06300aa.bin from tftp 10.20.81.154 to primary:
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................TFTP: Download to flash done.

5) Bundle LP FPGA skipped, same FPGA versions exist.

1) Install MP monitor image /Monitor/ManagementModule/xmb06200.bin from tftp 10.20.81.154
..................................Verified OK
FIPS: Image verification passed for monitor

SYSLOG: <14>Aug  9 2019 19:41:31 FIPS: Image verification passed for monitor 
Done

2) Install LP monitor image /Monitor/InterfaceModule/xmlb06200.bin from tftp 10.20.81.154
Save a copy to MP's flash, please wait........................................Verified OK
FIPS: Image verification passed for lp-monitor-0

SYSLOG: <14>Aug  9 2019 19:41:34 FIPS: Image verification passed for lp-monitor-0 
Done
Copy file /slot1/tmp-lp-monitor-0 on MP to file monitor on all LP slots
.....File Download: /slot1/tmp-lp-monitor-0 (MP) -> monitor (LP 1) is done.
.File Download: /slot1/tmp-lp-monitor-0 (MP) -> monitor (LP 3) is done.
File Download: /slot1/tmp-lp-monitor-0 (MP) -> monitor (LP 2) is done.
File download to interface module is done (3 successful)

3) Install MP application image /Application/ManagementModule/xmr06300aa.bin from tftp 10.20.81.154 to primary:
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................Verified OK
FIPS: Image verification passed for primary

SYSLOG: <14>Aug  9 2019 19:42:58 FIPS: Image verification passed for primary 
Done

4) Install LP application image /Application/InterfaceModule/xmlp06300aa.bin from tftp 10.20.81.154 to primary:
Save a copy to MP's flash, please wait................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................Verified OK
FIPS: Image verification passed for lp-primary-0

SYSLOG: <14>Aug  9 2019 19:44:02 FIPS: Image verification passed for lp-primary-0 
Done
Copy file /slot1/tmp-lp-primary-0 on MP to file primary on all LP slots
......................................................................File Download: /slot1/tmp-lp-primary-0 (MP) -> primary (LP 1) is done.
.......File Download: /slot1/tmp-lp-primary-0 (MP) -> primary (LP 3) is done.
.File Download: /slot1/tmp-lp-primary-0 (MP) -> primary (LP 2) is done.
File download to interface module is done (3 successful)

5) Bundle LP FPGA skipped, same FPGA versions exist.

SYSLOG: <14>Aug  9 2019 19:45:20 Single-command upgrade completed successfully. 

System Upgrade Done.
Upgrade Summary 
  Source: tftp 10.20.81.154 Directory  
1) Installed /Monitor/ManagementModule/xmb06200.bin to MP Monitor
2) Installed /Monitor/InterfaceModule/xmlb06200.bin to LP Monitor on all LP slots
3) Installed /Application/ManagementModule/xmr06300aa.bin to MP Primary
4) Installed /Application/InterfaceModule/xmlp06300aa.bin to LP Primary on all LP slots
5) Skipped /Combined/FPGA/lpfpga06300aa.bin to LP FPGA Bundled, same versions exist.

Checking for coherence...
Done.
device#