Counters and Statistics Overview

Note

This section does not apply to the SLX 9150 device.

SLX-OS uses algorithmic and sequential sampling simultaneously. This combination ensures that the entire counter engine database is periodically delivered into the software. You can set the sequential sampling timer to a lower rate as the overflow is prevented by algorithmic sampling.

Statistics collection mechanisms

In this implementation, statistics collection uses counter engines as a collection mechanisms.

With counter engines:

There are 16 on-chip counter engines with 16k packet and octet counters each.
Two mini counter engines B0/B1 are dedicated to the egress queue and support 4k 64-bit entries.
Each counter engine can be individually assigned to a statistics source.
A statistic flow is mapped to a set of counters within one of the counting engines.
A packet is mapped to a counter pair within a counter set according to the packet's disposition (drop/forward status) and color.