Specifying the master CPU and the standby-to-master delay
Note
This procedure only applies to VSP 8600 Series.
Specify the master CPU to designate which CPU becomes the master after the switch performs a full power cycle. This procedure applies only to hardware with two CPUs.
About this task
Configure the standby-to-master delay to set the number of seconds a standby CPU waits before trying to become the master CPU. The standby-to-master delay applies when two CP modules are booting at the same time. The designated standby CP waits for the configured number of seconds before attempting to assert mastership. Only one CP can be master in a chassis.
Caution
If you configure the master-to-standby delay to too short a value, the configured standby CP can become a master. If you configure the master-to-standby delay to too long, it can delay the backup CP asserting mastership and continue booting when the designated CP is inserted, but fails booting.
Procedure
Example
Switch:1>enable Switch:1#configure terminal
Specify the slot number, either 1 or 2, for the master CPU:
Switch:1(config)# boot config master 2 Switch:1(config)# save config
Specify the number of seconds a standby CPU waits before trying to become the master CPU:
Switch:1(config)# boot config delay 30 Switch:1(config)# save config Switch:1(config)# reset
Variable Definitions
The following table defines parameters for the boot config master command.
Variable |
Value |
---|---|
<1–2> |
Specifies the slot number, either 1 or 2, for the master CPU. The default value is slot 1. |